Throughput and Delay Bounds for Input Buffered Switches Using Maximal Weight Matching Algorithms and a Speedup of Less than Two
نویسنده
چکیده
Abstract. Two main performance features of high-bandwidth switches are stability and delay. This paper investigates these performance features for input buffered switch architectures that deploy maximal weight matching algorithms to determine the configurations of the switching core. For this purpose, a novel mathematical model of the dynamics of a maximal weight matching algorithm is developed. Based on this model, it is shown that certain maximal weight matching algorithms provide stability when the switching core runs at a speedup of less than two. In addition, bounds on the expected average delay and on the absolute delay are established.
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